list P=16C84, F=INHX8M ;******************************************* ;* Gameboy PIC PORT * ;* * ;* Using Gameboy Serial Port * ;* * ;* 1. 8-bit bi-directional parallel port * ;* * ;* 2. Joystick port using Nintendo 64 * ;* or compatible controller * ;* * ;* By Ken Kaarvik * ;* * ;* This code is written for a 16F84 * ;* microcontroller made by MICROCHIP. * ;* A 16C84 will not work -not enough ram * ;* * ;* Xtal = 10 MHz * ;* * ;* I have tested this with GBDK2.0b13 * ;* * ;******************************************* ; ;PIC16F84 pinout ; ____________ ; | | ; 1-|A2 A1|-18 ; | | ; 2-|A3 A0|-17 ; | | ; 3-|A4 osc1|-16 ; | | ; 4-|MCLR osc2|-15 ; | | ; 5-|Vss Vdd|-14 ; | | ; 6-|B0 B7|-13 ; | | ; 7-|B1 B6|-12 ; | | ; 8-|B2 B5|-11 ; | | ; 9-|B3 B4|-10 ; | | ; ~~~~~~~~~~~~ ; ;Wiring description ; ;PIC16F84 Vss 0v ; Vdd +5v ; MCLR +5v ; osc1 10MHz xtal,15 pf CAP to 0V ; osc2 other end of xtal,another 15 pf CAP to 0V ; ; A1 Gameboy serial in pin3 (see Jeff's drawing) ; A2 Gameboy clock pin5 ; A3 Gameboy serial out pin2 ; 0v Gameboy ground pin6 ; ; A0 10k-ohm RES to +5v ; A0 N64 controller signal (centre pin) ; ; B7-B0 Bi-Directional port ; Each pin set up as open collector ; (leave unused pins open - ; there are pull-up resistors ; built in on PORTB) ; ;N64 controller ; This is a description of an N64 controller jack ; (not the plug on the controller itself - you probably ; would want to use an extension cable cut in half and ; use the jack portion, leaving the controller wiring ; intact). ; ; Looking at the jack with flat side down,left to right: ; (same as looking at an N64 console) ; +3.5v,signal,0v ; I used two diodes in series from +5v to power controller ; ;How it all works: ; When the PIC PORT is first powered up it sits and waits ; for a single command byte from the Gameboy (from 0x00 ; to 0xFF) then sends back to the Gameboy a single ; response byte. ; ; command byte response byte ; (from GB) (from PIC PORT) 7 6 5 4 3 2 1 0 ; 0x00 N64 buttons A B Z S padup down left right ; 0x01 N64 buttons L R cup down left right ; 0x02 N64 joystick x-axis signed ; 0x03 N64 joystick y-axis signed ; ; 0x04 to 0xFF Parallel port status ; ; If 0x0F (b00001111) is sent from Gameboy this clears B7-B4 as ; output lows and B3-B0 float high.The PIC PORT then reads back ; status from Parallel port.B7-B4 would be 0's and B3-B0 would ; be 1's unless pulled low. Therefore B3-B0 can be thought of ; as outputting 1 or B3-B0 can be thought of as inputs. ; I would suggest only driving an input low to the PIC PORT ; and let a hi be floating and take advantage of the pullups ; (unless you're sure your driving an input). ; ; There is a limitation on the Parallel port: ; at least one bit B7-B3 has to set to 1 since ; 0x00-0x03 are reserved to read N64 controller ; (perhaps I will use last spare input as a way ; to bypass N64 mode) ; ;Here's how I would read the joystick x-axis in GBDK ; _io_out=2; ; send_byte(); ; while(_io_status==IO_SENDING); ; receive_byte(); ; while(_io_status==IO_RECEIVING); ; printf("x-axis = %d",_io_in); ; ; ; ; w equ 0 f equ 1 pcl equ 2 tempone equ 0c temptwo equ 11 ; 7 6 5 4 3 2 1 0 joy_byte_0 equ 0d ; A B Z S pad up down left right joy_byte_1 equ 0e ; L R c up down left right joy_byte_2 equ 0f ;joy stick x-axis signed, up positive ~80+- joy_byte_3 equ 10 ;joy stick y-axis signed, right positive joy_byte_4 equ 11 ;spare util_bits equ 12 loop_counter equ 13 byte_from_gb equ 14 byte_to_gb equ 15 raw_data equ 16 ;the next 29 regs are also used #define mode_select PORTA,4 #define N64_bit PORTA,0 #define GBout PORTA,3 ;gameboy out (input to pic) #define clock PORTA,2 #define GBin PORTA,1 ;gameboy in (output from pic) #define prev_bit util_bits,0 #define clock_tris INDF,2 #define N64_tris INDF,0 include "P16c84.inc" power_up bsf STATUS,RP0 movlw b'00001101' ;set PORTA 3,2,0 input movwf TRISA movlw b'11111111' ;set PORTB inputs and use change TRISB movwf TRISB ;to float out 1 bcf OPTION_REG,NOT_RBPU ;use PORTB pullups bcf STATUS,RP0 movlw b'00010000' ;intialize ports movwf PORTA movlw b'00000000' movwf PORTB start call wait_for_gameboy call get_requested_byte call delay call delay call delay call delay call delay call delay call send_to_gameboy call delay call delay call delay call delay call delay goto start wait_for_gameboy movlw d'8' movwf loop_counter movlw 0x55 movwf byte_to_gb wait_again rlf byte_to_gb btfss STATUS,C bcf GBin btfsc STATUS,C bsf GBin movlw d'60' ;set up time out counter movwf tempone wait_for_zero decfsz tempone goto $+2 goto wait_for_gameboy ;check serial connection btfsc clock ;4instr*.4us*60=80us goto wait_for_zero ;if we wait>80us then start over wait_for_one btfss clock goto wait_for_one btfsc GBout ;read GBout on pos clock edge bsf STATUS,C btfss GBout bcf STATUS,C rlf byte_from_gb decfsz loop_counter goto wait_again return get_requested_byte movlw b'11111100' ;check to see if we will andwf byte_from_gb,w ;read N64 controller or btfss STATUS,Z ;write/read PORTB goto grb1 ;call delay ;call delay call get_raw_data call convert_raw_data call get_joypad_byte return grb1 call write_read_portb ;call delay ;call delay ;call delay ;call delay return write_read_portb movlw TRISB movwf FSR ;movf PORTB,w ;movwf byte_to_gb ;read all portb movf byte_from_gb,w movwf INDF ;set up output on portb call delay movf PORTB,w movwf byte_to_gb ;read all portb return get_joypad_byte movlw b'00000011' andwf byte_from_gb,w addlw joy_byte_0 ;set up FSR movwf FSR movf INDF,w movwf byte_to_gb return ;display_gameboy ;use for testing only ;comf joy_byte_1,w ;comf byte_to_gb,w ;movwf PORTB ;return send_to_gameboy movlw TRISA ;set up FSR to simulate O/C movwf FSR ;on PORTA,2 movlw d'8' movwf loop_counter send_again rlf byte_to_gb btfss STATUS,C bcf GBin btfsc STATUS,C bsf GBin nop bcf clock nop bcf clock_tris call delay_60us bsf clock_tris call delay_60us decfsz loop_counter goto send_again bsf clock_tris return delay_60us movlw d'50' movwf tempone decfsz tempone goto $-1 return convert_raw_data ;Here is my theory: ; If I sample every .8us then I should see ; a one if I see 01111 or 00111 in raw data ; a zero if I see 00011 or 00001 in raw data ; ^ ^ ; look at 3rd bit for value ; a one is low for ~1us ; a zero is low for ~3us bsf prev_bit movlw d'240' ;we have 30x8 bits of raw data to shift movwf loop_counter ;thru the carry bit and examine top call big_rotate ;we now have bit in C to examine ;we are only looking for a '0' at this point btfsc STATUS,C ;if we find a '1' we are going to do: bsf prev_bit ; -set prev_bit btfsc STATUS,C ; -quit examing this bit goto bottom btfss prev_bit ;however if we find a '0' we will: goto bottom ; -check if this is first '0' (goto bottom if not) bcf prev_bit call big_rotate ; -if this is first '0' then examine 3rd bit call big_rotate rlf joy_byte_3 ; -this third bit will be THE VALUE rlf joy_byte_2 ; that we are looking for rlf joy_byte_1 rlf joy_byte_0 rlf joy_byte_4 decfsz loop_counter ; we now have two less bits to examine goto skip_1 goto finnished skip_1 decfsz loop_counter goto bottom goto finnished bottom decfsz loop_counter ;we have one less bit to examine goto top finnished rrf joy_byte_4 ;correct for 33rd bit (always 0) rrf joy_byte_0 rrf joy_byte_1 rrf joy_byte_2 rrf joy_byte_3 return big_rotate rlf raw_data rlf raw_data+1 rlf raw_data+2 rlf raw_data+3 rlf raw_data+4 rlf raw_data+5 rlf raw_data+6 rlf raw_data+7 rlf raw_data+8 rlf raw_data+9 rlf raw_data+10 rlf raw_data+11 rlf raw_data+12 rlf raw_data+13 rlf raw_data+14 rlf raw_data+15 rlf raw_data+16 rlf raw_data+17 rlf raw_data+18 rlf raw_data+19 rlf raw_data+20 rlf raw_data+21 rlf raw_data+22 rlf raw_data+23 rlf raw_data+24 rlf raw_data+25 rlf raw_data+26 rlf raw_data+27 rlf raw_data+28 rlf raw_data+29 return delay movlw d'10' movwf tempone ; d11 movlw d'84' movwf temptwo d22 decfsz temptwo,f goto d22 decfsz tempone,f goto d11 return get_raw_data bcf N64_bit movlw TRISA movwf FSR bcf N64_tris ;send out 9 bits call delay_7 bsf N64_tris nop nop bcf N64_tris ;send out 2nd call delay_7 bsf N64_tris nop nop bcf N64_tris ;send out 3rd etc call delay_7 bsf N64_tris nop nop bcf N64_tris ;4th call delay_7 bsf N64_tris nop nop bcf N64_tris ;5th call delay_7 bsf N64_tris nop nop bcf N64_tris ;6th call delay_7 bsf N64_tris nop nop bcf N64_tris ;7th call delay_7 bsf N64_tris nop nop bcf N64_tris ;8th nop nop bsf N64_tris call delay_7 bcf N64_tris ;9th nop nop bsf N64_tris call delay_7 ;now we have sent 9 bits,now wait ;for response of 32 bits ;we should now see something coming back rrf PORTA,w ;let's sample every .8us 240 times (192us) rlf raw_data+29 ;the response from origial nintendo ~125us rrf PORTA,w ; ultra racer ~170us rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+29 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+28 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+27 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+26 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+25 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+24 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+23 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+22 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+21 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+20 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+19 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+18 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+17 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+16 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+15 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+14 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+13 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+12 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+11 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+10 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+9 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+8 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+7 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+6 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+5 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+4 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+3 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+2 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data+1 rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data rrf PORTA,w rlf raw_data return delay_7 nop nop nop delay_4 return end